Vuori User's Guide > Vuori hardware > Processor architecture
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Processor architecture

This section describes the processors in Vuori.

The processors in Vuori are six-core AMD Opteron and Intel X5650 64-bit processors running at 2.6 GHz. They comprise several components, six cores with individual L1 and L2 caches, an integrated memory controller and three coherent HyperTransport links. A crossbar switch links the components together.


Core

Opteron and Intel support both 64-bit x86-64 instructions, as well as legacy x86 instructions. In addition, they support several important extensions:  SSE, SSE2, SSE3, MMX and 3DNow!. In numerical code SSE and SSE2 are of great importance in order to achieve good performance. Each core has an SSE2 functional unit that can calculate four 64-bit floating-point results per clock, giving a theoretical maximum throughput of 62.4GF/s per processor.


Cache

Each Opteron core has two 64 KB L1 caches: one instruction cache and one data cache. The L1 data cache has a 3-cycle latency and supports two 64-bit operations per cycle.  In addition, each core has a 512 KB L2 cache with a latency of 11 cycles. The cache architecture is exclusive, data in L1 is not duplicated in L2. Each Intel core has two 64 KB L1 caches and 12288 L2 cache.


Memory

Opteron compute nodes have 16 GB or 32 GB DDR2-800 ECC memory in a dual-channel configuration. This gives each core 1,33 GB or 2,66 GB of memory with a peak transfer rate of 12,8 GB/s. The service nodes have 2,66 GB of memory per core. Intel nodes have 96 GB each, 8 GB per core.